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Imperas ISS is fastest ARMv8 simulation available
Oxford, United Kingdom, May 6th, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation and processor core models, has released an Instruction Set Simulator (ISS) for the ARMv8-A architecture. In addition, Imperas announced its roadmap for products and virtual platforms supporting the ARMv8 family, including having two Extendable Platform Kits™ (EPKs™) available by the end of Q2.
The ARMv8-A architecture currently has two core families, Cortex™-A53 and Cortex-A57. The ARMv8-A architecture is ARM’s first 64-bit processor architecture, with initial licensees being primarily in the mobile and server market segments. With a new architecture, new cores and, in the server space, new applications for ARM® cores, testing of the software becomes increasingly important. With test suites typically consisting of hundreds or even thousands of tests, each of over 10 billion instructions, simulation speed is critical for robust and comprehensive testing of the software.
The Imperas simulation solutions together with the Imperas ARMv8 ISS and upcoming Imperas ARMv8 processor models provide the highest simulation performance available in the market.
The Imperas ARMv8 ISS enables the development, debug and test of applications and firmware running directly on the ARMv8 cores. The Imperas ARMv8 ISS includes a sparse memory model allowing the full memory space to be simulated. Software debug is facilitated by an interface to GDB and the Eclipse IDE. Current Imperas users will be able to add support for the Imperas ARMv8 ISS at no charge.
The Imperas roadmap includes the release of the EPKs for the Cortex-A53 and Cortex-A57 by the end of Q2.
The Extendable Platform Kits (EPKs) are virtual platforms with all models, except for the processor core models, released as source code from the Open Virtual Platforms (OVP) website. This enables users to add to and to customize the virtual platform in the EPK to meet their needs, including choosing how many of the Cortex-A53/A57MPCores to implement. EPKs are available with both OVP (C language) and SystemC (C++) interfaces. EPKs typically have some operating system or software running on the EPK. For the Cortex-A53 and Cortex-A57, Linaro Linux, including Linaro SMP Linux for the MPCore™ platforms, will be running on the EPKs. Additional EPKs will include not only the homogeneous Cortex-A53 and Cortex-A57 models, but also microcontrollers such as the Cortex-M3 and Cortex-M4 in conjunction with the Imperas ARMv8 models.
The EPK releases will be supported by the full range of Imperas products, including QuantumLeap™, the Imperas parallel simulation accelerator. QuantumLeap enables the Imperas simulators to take advantage of multiple x86 cores in the host PC to accelerate simulation performance, increasing the performance advantage of Imperas over other simulation solutions by an additional 2-3x on a quad core host.
"Software quality is directly proportional to simulation speed," noted Simon Davidmann, CEO of Imperas. "With our 15x performance advantage with the Imperas ARMv8 ISS, and even more with future releases and QuantumLeap, software test suites can be run over an extended lunch rather than taking all week. This is a significant advantage for the industry leaders building advanced systems utilizing ARMv8 processor cores."
About Imperas
Imperas Software was founded in 2008 to develop and deliver embedded software development systems. The company's comprehensive product line enables the rapid creation of high-performance virtual platforms and the efficient development of embedded software utilizing those platforms. Imperas’ technology allows for software engineering schedules to be significantly reduced while improving the quality of products relying on embedded systems. In 2008 Imperas founded the Open Virtual Platforms (OVP) consortium to improve the availability of open model libraries and virtual platform infrastructure. Leading communications, automotive, consumer electronics and embedded processor companies rely on Imperas for the development of their electronic products. The company's corporate headquarters is located near Oxford, UK and it maintains support and sales organizations in Silicon Valley, California and Tokyo, Japan. For more information about Imperas, please go to www.imperas.com.
Imperas, Open Virtual Platforms, QuantumLeap, EPK, Extendable Platform Kits, OVP, OVPsim, M*SDK, C*DEV, S*DEV, M*DEV, ToolMorphing and SlipStreamer are trademarks of Imperas Software Limited. Imperas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
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Professor Jong Tae Kim
Sungkyunkwan University, Seoul, South Korea - SKKUImperas OVP modeling and high-level simulation platforms unify both hardware and software development for multi-core designs, and are clearly the wave of the future. Access to the University Program allows my students access to advanced technologies essential to their future endeavors.
Andrew Schmidt
University of Southern California’s Information Sciences Institute (USC/ISI)Imperas tools and models provide us with enhanced capabilities to pursue research we could not otherwise achieve with significantly less upfront development effort. The virtual platforms allow us to rapidly explore state-of-the-art prototypes and bridges the gap between hardware and software development.