As the MIPS design and verification teams transition to RISC-V, we see a lot of benefits from adopting the open ISA specification.
As an IP company, we have a significant focus on the quality and verification of our processor IP deliverables. Imperas are the leaders in RISC-V simulation and verification and, with more than a decade of collaboration, they are the obvious DV partner for MIPS and its new RISC-V offerings.
Mark Jensen, Director, Processor Platforms Marketing
Xilinx
Imperas, with its OVP Fast Processor Models and software development tools, is addressing key issues in software development for embedded systems. We are excited to work with Imperas to ensure that high quality models are easily available to our customers worldwide, helping them to develop and test software faster and more efficiently using virtual platforms.