Software and Memory Footprint Challenge Traditional EDA

Software running close to the silicon hardware still presents many challenges for designs in terms of memory footprint optimization and security vulnerability

John Blyler, Editorial Director, of JB Systems wrote an interesting article on the challenges of embedded software.

Many former semiconductor chip tool vendors no longer frequent board-level embedded software shows. Instead, these companies are returning to conferences where the software lies closer to the silicon hardware. These companies – often in the simulation space – have found they have more in common with the chip industry than the embedded systems market and are returning to shows like ARM Techcon, Renesas Devcon and the like.

It’s no secret that the EDA tool vendors and semiconductor chip companies can no longer ship just the bare metal platform. They must include...

Follow the link to read the full article.

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