Silicon Labs selected Imperas simulation tools and RISC-V models for our design verification (DV) flow because of the quality of the models and the ease of use of the Imperas environment.
The Imperas golden reference model of the RISC-V core and their experience with processor RTL DV flows were also critical to our decision.
Enno Wein, Founder and CEO
ProximusDA
OVP Fast Processor Models are an essential foundation to system level design, helping to unleash innovation in this area. By providing free models and associated virtual prototyping infrastructure, OVP enables the ecosystem to focus on advanced technologies and solutions.