We were able to easily merge the Imperas simulator into our automated workflow on our build server for both unit and integration testing.  Running our tests with the production binaries on the simulator enabled us to find bugs that were not found when the software was cross compiled to the x86 Windows environment.

OVPsim beats QEMU in fidelity in CPU simulation - its determinism and speed were pretty impressive. OVPsim configurability is a big advantage as well. We were able to configure low-level CPU features, thanks to comprehensive documentation. I was also enthusiastic about the machine description file. It was easy to connect a missing interrupt signal we needed.

We are all aware of the importance of security, especially in the IoT. Imperas, with their participation in the prpl Foundation, support for the prpl platform, and their high-performance releases, are making important contributions in this arena.

Imperas virtual platforms and models for the open RISC-V architecture will enable early software development, long before hardware is available. These RISC-V Imperas virtual platforms lower software development costs, increase quality, improve time to market, and reduce software development risks.

Virtual platforms are moving into the mainstream of embedded software flows.  Imperas tools and models lead the market, and adding distribution to our relationship enables us to provide complete and comprehensive solutions to our customers.