RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations.
The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.
Bruce Weyer, vice president and business unit manager
Microsemi Corporation
Building out the Mi-V RISC-V ecosystem with the Imperas Extendable Platform Kit (EPK™) is a vital piece of our ecosystem offering as we continue to expand this program and enhance our ability to deliver innovative solutions for customers. The Imperas EPK allows for rapid software development and debugging of corner cases when using Mi-V soft CPUs on Microsemi field programmable gate array (FPGA) products.