Comments
Rick O’Connor, President & CEO
OpenHW GroupThe open RISC-V ISA specification is an excellent starting point and open-source processor IP cores, such as the CORE-V family, have real potential to change the industry.
The high-quality open-source CORE-V CV32E40P core now allows the broadest participation in the RISC-V revolution, the OpenHW MCU Dev/Kit project is just one example of the innovations that can now be developed from the quality foundation provided by the CV32E40P core, having been verified with the CORE-V-VERIF testbench which leverages the Imperas RISC-V golden reference model.
Hermann Haslauer, Head of Embedded Software Support Engineering
Palfinger Europe GmbHPalfinger is the global leader for innovative crane and lifting solutions.
As our embedded development teams develop and implement our roadmap for digitalization and artificial intelligence, the need for software quality testing has never been greater. The TESSY tool together with the Imperas virtual platform simulators and OVP models of Arm processors, are a quality combination that we use as a foundation of our software test and maintenance process.