The free and open nature of the RISC-V ISA fosters unprecedented levels of processor innovation. To harness this design freedom, the ecosystem requires robust development tools and the assurance that verification test benches can be developed and validated on supplier-neutral platforms. Imperas’ new riscvOVPsim is an important suite of tools that addresses this challenge.
Nobuyuki Ueyama, President
eSOL TRINITY Co., Ltd.
The open ISA of RISC-V is enabling a new wave of processor design innovation across the spectrum of compute requirements in almost all market segments.
High quality processor verification is not a simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV enables the eSOL TRINITY team to support the expert design teams at NSITEXE and other leading adopters of RISC-V in Japan.