Allen Baum, Chair of the RISC-V International Architecture Test SIG
Esperanto Technologies, Inc.
Functional coverage is fundamental to all modern processor verification plans; it marks the progress to project completion and release for prototype manufacture.
The release of the Imperas SystemVerilog functional coverage library with a permissive free-to-use license will now benefit all RISC-V verification teams and complements the work of the RISC-V International Architecture Tests SIG.
Jim Nicholas
VP, MIPS Business Operations, Imagination Technologies
It is exciting and gratifying to see members of the MIPS ecosystem working together to provide new software, tools and methodology to MIPS users. The hardware virtualization features in our MIPS M51xx CPUs make them a unique and powerful offering for next-generation microcontroller-class products. We’re pleased to see these new solutions from Imperas and SELTECH that can help our customers more quickly and easily bring secure, reliable devices to market.