Our verification methodology for the Panther DSP/AI Accelerator IP needs to address not just the full range of the current configuration options but also the roadmap for Panther.
ImperasDV is the cornerstone of our simulation-based DV strategy, with the Imperas golden reference model, scoreboard, verification IP, functional coverage analysis and debug efficiency.
Professor Fernando Gehm Moraes
Pontifical Catholic University of Rio Grande do Sul, Brazil - PUCRS
At PUCRS, we use Imperas virtual platforms in projects on multiprocessor SoC modeling, power evaluation, and programmability, as well as computer science graduate program courses on SoCs and research architecture. Our research group (Grupo de Apoio ao Projeto de Hardware, or Hardware Design Support Group), also leverages these tools.