University of Southern California’s Information Sciences Institute (USC/ISI)
Imperas tools and models provide us with enhanced capabilities to pursue research we could not otherwise achieve with significantly less upfront development effort. The virtual platforms allow us to rapidly explore state-of-the-art prototypes and bridges the gap between hardware and software development.
Nobuyuki Ueyama, President
eSOL TRINITY Co., Ltd.
The open ISA of RISC-V is enabling a new wave of processor design innovation across the spectrum of compute requirements in almost all market segments.
High quality processor verification is not a simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV enables the eSOL TRINITY team to support the expert design teams at NSITEXE and other leading adopters of RISC-V in Japan.