The eVocore P8700 Multiprocessor is our first RISC-V based IP core.
As an open standard ISA, RISC-V provides a foundation for a basic level of compatibility across technologies in the ecosystem. Together with Imperas and Ashling we are going beyond that, enabling SoC designers and software developers to take advantage of the P8700’s advanced microarchitectural features using best-in-class models and tools.
Rick O’Connor, President & CEO
OpenHW Group
Fundamental to the OpenHW CORE-V open-source processor family is high-quality verification that has been achieved with the help and support of the dedicated OpenHW members and contributors.
I am excited that Simon [Davidmann, CEO of Imperas] is lending his verification expertise and vision [as Chair] to expand the scope of the OpenHW Verification Task Group to address industry-wide standards and methodologies for all RISC-V adopters.