Shubhodeep Roy Choudhury, Managing Director & Co-founder
Valtrix Systems
Ideally any test should provide a clear pass or fail indication. In the case of RISC-V processor DV this is achieved with a comparison against a quality reference model.
STING helps generate portable, architecturally correct and self-checking tests targeted at the corner-case scenarios by automating the comparison of the DUT against the Imperas reference model results.
Simon Davidmann, President and CEO
Imperas Software
Having partnered with the Wave Computing MIPS engineering team and IP customers over the past decade, our model and simulation technology has enabled MIPS-based devices to be deployed across a broad range of embedded markets.This no-cost MIPSOpenOVPsim instruction set simulator is an ideal start for developers looking to explore the potential of various SoC designs through Wave Computing’s MIPS Open program.