Comments
Yunsup Lee, co-founder and CTO
SiFiveSiFive’s Core Designer allows our customers to customize our broad portfolio of RISC-V Core IP for their particular application. The donation of a robust, commercial-quality simulator such as riscvOVPsim™ will enable them to adopt RISC-V even faster. This is the level of close industry collaboration that will drive the successful adoption of RISC-V.
Dr. Charlie Su, President and CTO
Andes Technology Corp.RISC-V represents the potential for innovation, and it is the implementation of great ideas that are really generating exceptional results.
To unlock such potentials, Andes provides the AndeSysC™ environment, an extensible and near-cycle accurate SystemC model library for all AndesCore®. SoC architects can use it to construct a SystemC based virtual platform for performance evaluation of critical code segment and hardware/software co-optimization. ACE technology helps users implement custom functions and instructions, and it directly connects to the AndeSysC™ environment. Now with the close integration with the Imperas fast reference models and tools, design teams can embark on architecture exploration with complete application software for the next generation of domain specific devices with a seamless path to ACE implementation.