RISC-V represents an inflection point for semiconductor verification as the design freedoms provided by the open ISA means an assumption of the responsibility of the processor and system verification task.
In partnering with Imperas, the leaders in RISC-V processor verification, we can offer a combination of technologies and interface standards for IP and SoC testing that ensures commercial grade verification for these flexible devices right through to the end platform.
Gunar Schirner
Associate Professor, Northeastern University, Boston, USA
I find Imperas tools and models invaluable for my research and my course, High Level Design of Hardware Software Systems. My students can now explore and command state-of-the-art prototyping technology for complex systems.