RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations.
The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.
Mark Jensen, Director, Processor Platforms Marketing
Xilinx
Imperas, with its OVP Fast Processor Models and software development tools, is addressing key issues in software development for embedded systems. We are excited to work with Imperas to ensure that high quality models are easily available to our customers worldwide, helping them to develop and test software faster and more efficiently using virtual platforms.