The OpenHW Group charter is to deliver high quality processor IP cores for our leading commercial members and open source community adoption.
Central to this goal, the OpenHW Verification Task Group developed and published a DV test plan and implemented an open engineering-in-progress approach as we complete the verification tasks using the Imperas golden RISC-V reference model.
Premal Buch, VP Software
Altera
Given the wide variety of customer applications for our SoC FPGAs, our software stacks require rigorous and comprehensive testing. Imperas' M*SDK has proven to be an outstanding environment for the validation and analysis of operating systems, drivers and firmware. Verification using the Imperas solution not only accelerates software bug discovery, but also provides a rapid understanding of the root cause of problems.