RISC-V is at the forefront of a hardware design renaissance in optimized processors.
But, an ISA only provides the envelope of possibilities. The art and science of processor optimization requires complete feature exploration and verification, which are supported by the reference model simulation and verification technology from Imperas.
Mark Himelstein, CTO
RISC-V International
RISC-V International’s mission is to support the adoption of RISC-V through industry-wide partnerships and collaboration.
The continued contributions, including the Imperas Open Source Architecture tests, are helping to ensure an ecosystem of compatibility that all members and users can build on.