At Ventana, our teams of developers are building the foundational processor IP and chiplet building blocks that will enable a step change in performance for the most demanding compute workload markets.
Our verification strategy is to exercise the RISC-V based processors across the most demanding scenarios and are using Imperas RISC-V vector test suites in addition to the Imperas golden reference model in our verification environment.
Rick O’Connor, President & CEO
OpenHW Group
Fundamental to the OpenHW CORE-V open-source processor family is high-quality verification that has been achieved with the help and support of the dedicated OpenHW members and contributors.
I am excited that Simon [Davidmann, CEO of Imperas] is lending his verification expertise and vision [as Chair] to expand the scope of the OpenHW Verification Task Group to address industry-wide standards and methodologies for all RISC-V adopters.