RISC-V is enabling a new wave of design innovation, and successful projects depend on quality processor IP and dependable design platforms that offer architecture exploration and early software development.
Having supported the NSITEXE team on the extensive internal RISC-V processor verification, as well as on the virtual platform development task for multiple projects, the support team at eSOL TRINITY is now able to assist developers as they build the next generation of SoC designs using the Imperas tools and reference models for the NSITEXE Akaria processors.
Allen Baum, Chair of RISC-V Foundation Technical Committee Task Group for Compliance
Esperanto Technologies, Inc.
The work of the RISC-V Compliance Task Group is vital to the success of RISC-V and anyone trying to design or sell RISC-V based products. We welcome the contributions of Imperas and believe that using riscvOVPsim as one of the reference simulators could be highly valuable in the overall compliance effort.