By integrating our Xcelium Logic Simulator with Imperas's RISC-V verification technology, we've empowered NSITEXE to design the next-generation of its Akaria processors, which are optimized for safety-critical applications and compliant with the ISO 26262 ASIL D standard.
Our work together exemplifies Cadence’s commitment to collaboration and innovation to support our customers in the rapidly evolving semiconductor industry.
Rick O’Connor, President & CEO
OpenHW Group
One aspect that all RISC-V processor designers agreed on, both commercial vendors and open-source developers, is that quality is the key to successful IP core adoption.
The OpenHW Group have supported the adoption of RVVI from its inception through the member contributors in the OpenHW Verification Task Group, and now welcome the new features and growing adoption by the commercial community.