The Imperas University Program encourages participation in the embedded systems community in three ways: use on research projects, use in the classroom, and sharing of virtual platform models through the Open Virtual Platforms (OVP) Library.
Paul Cunningham, GM System & Verification Group
Cadence
By integrating our Xcelium Logic Simulator with Imperas's RISC-V verification technology, we've empowered NSITEXE to design the next-generation of its Akaria processors, which are optimized for safety-critical applications and compliant with the ISO 26262 ASIL D standard.
Our work together exemplifies Cadence’s commitment to collaboration and innovation to support our customers in the rapidly evolving semiconductor industry.