Comments
Arjan Bink, chair of OpenHW Cores Task Group
Silicon LaboratoriesHigh quality IP is an important deliverable that others can build on, but developers need more than just processor RTL to support high quality implementations.
All embedded software is closely related to the IP core it will run on; thus, an accurate ISS reference model is essential for all HW and SW adopters. riscvOVPsimCOREV is the key starting point for the support of the OpenHW CORE-V cores by the ecosystem.
Hideki Sugimoto, CTO
NSITEXE, Inc., a group company of DENSO CorporationThe NSITEXE Akaria processors, developed with the use of Imperas RISC-V verification technology and the leading-edge SystemVerilog simulator and debug tools from Cadence, are targeted to address the high-performance requirements for AI and automotive requirements. The Akaria processors include the necessary features and quality to achieve the ISO 26262 ASIL D functional safety standard, in addition to being optimized and efficient processors for the next-generation embedded application.
As the NSITEXE Akaria processors are adopted across a wide range of next-generation automotive, safety-critical, and embedded applications, the verification methodology with the support from Imperas and Cadence has been invaluable in achieving our quality goals and on-time development schedule.