We have seen that virtual platform based methodology can accelerate IoT product development. Imperas OVP models combined with the Imperas embedded software tools, supported by Coontec’s experienced staff, is a great solution for the Korean market.
Sebastian Ahmed, Senior Director of R&D
Silicon Labs
Silicon Labs selected Imperas simulation tools and RISC-V models for our design verification (DV) flow because of the quality of the models and the ease of use of the Imperas environment.
The Imperas golden reference model of the RISC-V core and their experience with processor RTL DV flows were also critical to our decision.