RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations.
The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.
Jean-Michel Fernandez, ESL Product Line Director
Magillem
The wide support of OVP fast processor core models, together with Imperas tools for software analysis, perfectly complements the Magillem Executable Specification (X-Spec) solution. The tight integration of Imperas technology with Magillem X-Spec will help our customers to seamlessly execute their embedded Software on their Hardware specification.