News & Press Articles

Imperas and SELTECH Collaborate on Hypervisor Development and Deployment

Imperas Partners with SELTECH, Provider of Hypervisor and Other Embedded Software Solutions

Oxford, United Kingdom, November 9, 2015 -- Imperas Software Ltd., leader in high-performance software simulation and virtual prototyping, today announced a collaboration with SELTECH Corporation for the development and deployment of the SELTECH FEXER OX hypervisor.  FEXER OX has been ported to the MIPS M-class M5150 CPU, and runs on both actual hardware and Imperas virtual platforms.  Imperas and SELTECH are also working together on tools in the Imperas M*SDK product for the bring up of guest operating systems and bare metal applications. In addition, as members of the prpl Foundation Security Working Group, Imperas and SELTECH are collaborating on testing of security in the hypervisor-based software stack.

The FEXER OX hypervisor takes advantage of the hardware virtualization features in the MIPS Warrior CPUs from Imagination Technologies such as the MIPS M-class M5150, to enable a high performance, low overhead virtualized environment for embedded systems.  This capability is key for systems with significant security and reliability requirements. 

Imperas to Demonstrate Renesas Device Virtual Platforms at Renesas DevCon 2015

Embedded Software Development, Debug and Test Solutions to be Shown

Oxford, United Kingdom, September 22, 2015 -- Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced their participation at Renesas DevCon 2015. Highlights will include demonstrations of Imperas embedded software development, debug and test solutions at the Imperas booth in the exhibition area.  The demos will feature virtual platforms for the latest and most popular Renesas devices, including those based on both Renesas proprietary processor cores and those devices based on ARM cores, such as the RCar family and the recently announced Synergy family.

Imperas Releases Second Generation of Open Virtual Platforms APIs and Adds to Free Model Libraries

Over 150 Fast Processor Models Now Available from the OVP Website

Oxford, United Kingdom, September 9th 2015 - Imperas today announces the release of the second generation of the Open Virtual Platforms™ (OVP™) APIs for building virtual platforms, additional Fast Processor Models, new models for popular peripherals and new Extendable Platform Kits™ (EPKs™).  Open Virtual Platforms is a website for the OVP APIs, for the OVP models and platforms, for the OVPsim simulator and for community discussion of virtual platforms on the OVP Forum.  The OVP APIs are publicly available and not proprietary, and the models and platforms are available under the Apache Open Source License.

New to OVP:

Universities Use Imperas Tools to Address Embedded Systems Research and Teaching Needs

Imperas Provides Free Access to Open Virtual Platforms Models and Imperas Software Development, Debug and Test Tools

Oxford, United Kingdom, August 20, 2015 - Imperas today announced the latest results and participation in the Imperas University Program.  The worldwide Imperas University Program was created to inspire and support the next generation of technologists and innovators. It grants academic and research institutions access to the tools and technology needed to prepare students to meet difficult challenges across embedded software, from development and test, to quality and standards compliance, to security and IoT. Through this program, Imperas software reaches thousands of students and professors worldwide every year. Benefits of membership in the program include access to Imperas virtual platform software, technical support, and more.

The Imperas University Program encourages participation in the embedded systems community in three ways:  use on research projects, use in the classroom, and sharing of virtual platform models through the Open Virtual Platforms (OVP) Library. 

Recent projects, presentations and publications by research groups include:

Fast Processor Models of ARM Cores Released by Imperas with Changes to OVP ARM Core Model Licensing Terms

Imperas Open Virtual Platforms Accelerate Embedded Software Development for Multi-Core ARM-based Designs

Oxford, United Kingdom, June 8th 2015 - Imperas™ today announces the release of Open Virtual Platforms™ (OVP™) Fast Processor Models for popular ARM® cores: Cortex®-A17, Cortex®-M0, Cortex®-M0+, and Cortex®-M1. Also announced are changes to the terms of licensing of the OVP ARM Models.

New Extendable Platform Kits™ (EPKs™) of ARM-based devices are available from Imperas, working together with the M*SDK™ tools, to help accelerate embedded software development, debug and test.  EPKs are virtual platforms (simulation models), including processor models plus peripheral models necessary to boot an operating system (OS) or run bare metal applications.  The platform and peripheral models included in the EPKs are open source, so that users can easily add new models to the platform as well as modify the existing peripheral models.  The example OS and/or applications are also included.

FlexTiles Adaptive Multicore SoC Virtual Platform Now Available from Imperas

Imperas Technologies Used for FlexTiles Program

Oxford, United Kingdom, 2 June 2015 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, today announced that a virtual platform for the FlexTiles platform is now available, based on Imperas™ and Open Virtual Platforms™ (OVP™) simulators and models. 

The FlexTiles platform is a self-adaptive heterogeneous multicore 3D System-on-Chip (SoC) architecture developed by a consortium of universities, research institutes and commercial companies, with funding from the European Union under the Seventh Framework Programme. A major challenge in computing is to leverage multicore technology to develop energy-efficient high-performance systems. This is critical for embedded systems with a very limited energy budget, as well as for supercomputers in terms of sustainability. Moreover, the efficient programming of multicore architectures is critical, especially with more than a thousand cores per SoC predicted by 2020.  These challenges were the drivers for the FlexTiles project.

Recore Systems Selects Imperas for Virtual Platform Based Software Development Tools

Imperas Extendable Platform Kit Accelerates Development for Recore Many-Core Hardware and Software Program

Oxford, United Kingdom, 2 April 2015 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced that Recore Systems has selected Imperas for virtual platform based software development tools.  Recore is building a new many core hardware platform for various applications, including embedded vision.  Recore was able to get started quickly by using an Extendable Platform Kit™ (EPK™) from Imperas. 

The FlexaWare platform (www.flexaware.net), new from Recore Systems, is a many-core embedded system with three closely connected components: many-core hardware, a runtime (many-core) OS, and a software development environment. As the platform is built from the ground up, it is imperative to test important design concepts immediately in a simulation environment, to confirm that they function as expected.

Since time to market is crucial, Recore Systems searched for a simulation framework that could support design space exploration as well as software development and test.  Recore selected Imperas because of the nature of the components already on offer in the Imperas EPKs.

Imperas is founding member of prpl Foundation's Security Working Group

Founding members of the Security PEG include Broadcom, CUPP Computing, Elliptic Technologies, Ikanos, Imagination Technologies, Imperas Software, Ingenic, Kernkonzept, Lantiq (recently acquired by Intel), Qualcomm Atheros, Inc., Seltech, and others.

In March 2015, the prpl Foundation, an open-source non-profit foundation focused on enabling next-generation datacenter-to-device portable software and virtualized architectures, today announced the formal organization of its Security PEG (prpl Engineering Group). The formation of the Security PEG follows months of intensive planning by a subset of prpl members dedicated to defining an open security framework for deploying secured and authenticated virtualized services in the IoT and related emerging markets.

The new Security PEG will define a security roadmap to get from today’s software-virtualized solutions to full hardware supported virtualization, enabling multi-domain security across processors (CPUs, GPUs, NPUs), heterogeneous SoCs and systems built on these technologies including connected devices, routers and hubs. In addition, the Security PEG will define necessary open APIs (application programming interfaces) for various levels of the security stack.

Fast Processor Models of MIPS Warrior Cores Released by Imperas and Open Virtual Platforms

Imperas Virtual Platform Products Provide Interface to Imagination Codescape Debugger

Oxford, United Kingdom, 23 February 2015 - Imperas™ is releasing the Open Virtual Platforms™ (OVP™) Fast Processor Models for the MIPS Warrior P-class and M-class CPU IP cores from Imagination Technologies.  Example virtual platforms are also being released, as well as support for the cores in the Imperas M*SDK™ advanced software development tools.  In addition, the Imperas M*SDK and M*DEV™ products support the use of the Imagination Codescape Debugger for embedded software debug and development.

The processor core models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/MIPS.  The models of the P5600 and M51xx processor cores, as well as models of other MIPS processors, work with the Imperas and OVP simulators, including the QuantumLeap™ parallel simulation accelerator, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

Magillem partnering with Imperas: Enabling IOT using virtual platforms

This week it was announced that Magillem has been working with Imperas on tools for Virtual Platforms.

Daniel Payne of SemiWiki covered it here at SemiWiki.

The X-Spec tool from Magillem will generate hardware and software code based on specifications, creating System C TLM code and embedded C code. Models come from Imperas using OVP technology.

The full press release can be found here on EDACafe.

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