Comments
Dr. Luciano Ost
Embedded Systems and Communications Research Group, University of LeicesterThe lack of electronic design automation (EDA) tools combining model flexibility, and fast and accurate evaluation of performance, power, and reliability is one of the major challenges currently faced by embedded researchers. Even expensive, commercially available tools don't often meet modeling and simulation needs for emerging technologies.The description of processors – i.e., register or gate-level – is rarely available to universities, and commercial licenses are quite expensive. Having free tools with different state-of-the-art processor models allows the exploration of new system architectures.
Kiran Vittal, senior director of Partner Alliances Marketing
Synopsys, Inc.RISC-V adoption is growing across key market segments as SoC teams explore the flexibility of an open standard ISA for optimized processors.
Our collaboration with Imperas, leveraging Synopsys’ leading simulation and debug solutions, enables our mutual customers to address verification complexities for RISC-V processor cores and quickly achieve coverage convergence.