Comments
Hideki Sugimoto, CTO
NSITEXE, Inc.The flexibility of the RISC-V ISA coupled with the performance of vector extensions is an ideal starting point for AI accelerators for automotive applications.
To address the verification requirement for our next generation of processors, we have developed an optimized verification flow with ImperasDV that our design team set up with detailed configuration options to deliver on their comprehensive verification plans that provides the industry leading quality our customers expect.
Rick O’Connor, President & CEO
OpenHW GroupThe open RISC-V ISA specification is an excellent starting point and open-source processor IP cores, such as the CORE-V family, have real potential to change the industry.
The high-quality open-source CORE-V CV32E40P core now allows the broadest participation in the RISC-V revolution, the OpenHW MCU Dev/Kit project is just one example of the innovations that can now be developed from the quality foundation provided by the CV32E40P core, having been verified with the CORE-V-VERIF testbench which leverages the Imperas RISC-V golden reference model.