Kiran Vittal, senior director of Partner Alliances Marketing
Synopsys, Inc.
RISC-V adoption is growing across key market segments as SoC teams explore the flexibility of an open standard ISA for optimized processors.
Our collaboration with Imperas, leveraging Synopsys’ leading simulation and debug solutions, enables our mutual customers to address verification complexities for RISC-V processor cores and quickly achieve coverage convergence.
Rick O’Connor, Founder and CEO
OpenHW Group
The OpenHW Group charter is to deliver high quality processor IP cores for our leading commercial members and open source community adoption.
Central to this goal, the OpenHW Verification Task Group developed and published a DV test plan and implemented an open engineering-in-progress approach as we complete the verification tasks using the Imperas golden RISC-V reference model.