Dr. Luca Benini, chair of digital circuits and systems and one of the originators of the RISC-V PULP project
ETH Zurich
RISC-V has made the successful transition from an academic project to achieve commercial adoption. We see a universal need for quality and design assurance that can be supported by riscvOVPsim across all projects as PULP RI5CY cores are increasingly implemented in commercial SoC development.
Allen Baum, Chair of the RISC-V International Architecture Test SIG
Esperanto Technologies, Inc.
The RISC-V open standard ISA offers a compatibility framework, yet has built-in flexibility across the specification envelope.
The Imperas contribution of new Crypto extension tests is a welcome addition to the trusted test suite portfolio, supporting implementers with verification of their hardware.