CTO Bluespec Inc. and Chair of RISC-V Formal Task Group
The RISC-V ISA Formal Spec Task Group will produce a Formal Specification for the RISC-V ISA. We see the introduction of riscvOVPsim as an excellent reference platform to test and verify with.
Hidemi Yokokawa, President
Tokyo NanoFarm
Japan is an exciting market for embedded software, and Imperas is addressing the most critical issue, software development. The combination of their Open Virtual Platforms, especially the OVP Fast Processor Models, and the Imperas Multicore/Multiprocessor Software Development Kit (M*SDK), with its advanced tools for embedded software verification, analysis and debug, is a great value to bring to software developers in Japan.