Zbyszek Zalewski, General Manager, Hardware Division
Aldec
The integration of HES with OVPsim enables hardware and software design teams to implement virtual models of processors, memory and peripherals while the RTL modules run in the emulator board. This new integration provides a high performance solution, ideal for early HW/SW co-development and architectural exploration.
Mike Ingster, President and Founder
Quantum Leap Sales
Imperas solutions for early software development have never been more appropriate with development schedules more critical than ever. We believe that simulation-based verification is fast becoming an essential requirement in complex SoCs, and together with advanced debug and analysis tools for many-core and heterogeneous designs will greatly reduce development schedules for next generation devices.