For our SystemC training courses, we want the attendees to focus on building SystemC models, and how to use those models. By using OVP Fast Processor Models, which work easily in SystemC virtual platforms, students do not have to worry about processor models, and are able to get the most out of our courses. The OVP models work well in our SystemC environment and also with other SystemC tools. We are excited to be able to expand our design service offerings in virtual platforms to our customers.
Itai Yarom, VP of Sales and Marketing
MIPS, Inc.
As a developer of leading high-performance RISC-V application processors, verification standards are an important companion to the RISC-V specifications.
Verification standards such as RVVI provide a solid foundation that supports all RISC-V adopters, from basic embedded cores through to complex application processors with multi-cluster, multi-core, multi-threading and out-of-order pipelines.