The open ISA of RISC-V is enabling a new wave of processor design innovation across the spectrum of compute requirements in almost all market segments.
High quality processor verification is not a simple task, but the ease of use and configurable approach with RVVI offered by ImperasDV enables the eSOL TRINITY team to support the expert design teams at NSITEXE and other leading adopters of RISC-V in Japan.
Phil Dworsky, Director Strategic Alliances
SiFive, Inc.
SoC projects are all about partnerships; hardware and software engineers working together, with a complete ecosystem of supporters.
With this Imperas collaboration, our mutual customers will benefit from the availability of SiFive qualified models that are compatible with the mainstream EDA tool flows.