RISC-V represents an inflection point for semiconductor verification as the design freedoms provided by the open ISA means an assumption of the responsibility of the processor and system verification task.
In partnering with Imperas, the leaders in RISC-V processor verification, we can offer a combination of technologies and interface standards for IP and SoC testing that ensures commercial grade verification for these flexible devices right through to the end platform.
Kiran Vittal, senior director of Partner Alliances Marketing
Synopsys, Inc.
RISC-V adoption is growing across key market segments as SoC teams explore the flexibility of an open standard ISA for optimized processors.
Our collaboration with Imperas, leveraging Synopsys’ leading simulation and debug solutions, enables our mutual customers to address verification complexities for RISC-V processor cores and quickly achieve coverage convergence.