The flexibility of RISC-V helps us address domain-specific requirements with custom processors that go beyond the roadmap of the mainstream IP providers.
Designing a high-performance RISC-V processor that achieved up to 3x the performance in critical workloads was no small feat. We needed to balance the features and options with the verification implications. The combined solution of Imperas golden reference models and Valtrix STING has helped us to achieve our verification and schedule goals.
Simon Davidmann, President and CEO
Imperas Software
Having partnered with the Wave Computing MIPS engineering team and IP customers over the past decade, our model and simulation technology has enabled MIPS-based devices to be deployed across a broad range of embedded markets.This no-cost MIPSOpenOVPsim instruction set simulator is an ideal start for developers looking to explore the potential of various SoC designs through Wave Computing’s MIPS Open program.