Allen Baum, Chair of the RISC-V International Architecture Test SIG
Esperanto Technologies, Inc.
Functional coverage is fundamental to all modern processor verification plans; it marks the progress to project completion and release for prototype manufacture.
The release of the Imperas SystemVerilog functional coverage library with a permissive free-to-use license will now benefit all RISC-V verification teams and complements the work of the RISC-V International Architecture Tests SIG.
Frank Poppen, Researcher
OFFIS - Institute for Information Technology of Germany
OVP was selected because of the ease with which models are built and the flexibility in interfacing to other tools. The availability of the ARM processor model we needed, and the open source nature of the OVP models, were also important factors.