All Imperas News

Fast Processor Models of MIPS Warrior Cores Released by Imperas and Open Virtual Platforms

Imperas Virtual Platform Products Provide Interface to Imagination Codescape Debugger

Oxford, United Kingdom, 23 February 2015 - Imperas™ is releasing the Open Virtual Platforms™ (OVP™) Fast Processor Models for the MIPS Warrior P-class and M-class CPU IP cores from Imagination Technologies.  Example virtual platforms are also being released, as well as support for the cores in the Imperas M*SDK™ advanced software development tools.  In addition, the Imperas M*SDK and M*DEV™ products support the use of the Imagination Codescape Debugger for embedded software debug and development.

The processor core models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/MIPS.  The models of the P5600 and M51xx processor cores, as well as models of other MIPS processors, work with the Imperas and OVP simulators, including the QuantumLeap™ parallel simulation accelerator, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

Imperas Participates in the Embedded World Conference February 2015

Imperas Software Ltd., are participating in the popular Embedded World Conference 2015 at the Nuremberg Convention Center Ost, NürnbergMesse, 90471 Nuremberg, Germany, February 24.-26, 2015.

The embedded world Exhibition and Conference is the world’s largest platform for embedded-system technologies and the "knowledge tank" of one of the most innovative sectors. With its slogan "We are the Internet of Things", the Embedded World Conference 2015 sends out a clear signal that the embedded sector has been paving the way to the Internet of Things (IoT) for quite some time, because the IoT is about the mass interconnectedness of embedded systems.

Larry Lapides, Vice President of Sales for Imperas, will speak on QuantumLeap and multicore software development, debug and test, emphasizing new parallelized virtual platform acceleration technology. Session 3/II, 16:00 Tuesday.

See Imperas demos in the Imagination Technologies Ltd. booth, hall 4 / 4-671.
 

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Magillem partnering with Imperas: Enabling IOT using virtual platforms

This week it was announced that Magillem has been working with Imperas on tools for Virtual Platforms.

Daniel Payne of SemiWiki covered it here at SemiWiki.

The X-Spec tool from Magillem will generate hardware and software code based on specifications, creating System C TLM code and embedded C code. Models come from Imperas using OVP technology.

The full press release can be found here on EDACafe.

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New models for MIPS Warrior CPUs

With the run up to the Embedded World conference and exhibition in Germany in February, Larry Lapides of Imperas contributed a guest blog for Imagination on the latest OVP Fast Processor models for the new MIPS Warrior range.

The blog talks about several items related to Imperas, OVP and Imagination's MIPS models. It also provides the outline for the Embedded World paper on accelerating simulation using multi-core host PCs and also provides links to other related topics.

To read the blog, please visit the Imagination Blog Site.

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Extendable Platform Kits for MIPS Released by Imperas

Enabling quick start for developing and testing software

Oxford, United Kingdom, 20 November 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced the availability of Extendable Platform Kits™ (EPKs™) for MIPS CPU cores from Imagination Technologies.

These EPKs for MIPS, available for download from the Open Virtual Platforms™ (OVP™) website, are designed to provide a base for users to run high-speed simulations of MIPS-based SoCs and platforms on any suitable PC. They are based on the functionality of Imagination’s MIPS FPGA evaluation platforms, enabling anyone to simulate MIPS-based systems using Imagination’s reference platforms. EPKs provide a base for users to extend the functionality of the virtual platform, to closer reflect their own platform, by adding more component models, running different operating systems or adding additional applications.

Kyma Systems Selects Imperas Virtual Platform Tools for Hypervisor Development

Imperas M*SDK used for KVM development supporting MIPS hardware virtualization instructions

Oxford, United Kingdom, June 3rd, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced today that Kyma Systems has been successfully using the Imperas M*SDK™ for virtual platform-based development of hypervisors.  M*SDK enabled porting of the KVM hypervisor to support Imagination Technologies' latest MIPS cores with virtualization extensions.  The OS- and CPU-aware tools included with M*SDK also enabled more comprehensive and faster testing of the hypervisor.     

Imperas Exhibiting at the Design Automation Conference, June 2-6, 2014 in San Francisco

Imperas is exhibiting at the Design Automation Conference, June 2-6 in San Francisco.  We will be in the ARM Connected Community Pavilion in the Exhibit Hall.  Come by to see our demos of the ARMv8 ISS, and Extendable Platform Kits (EPKs) booting Linaro Linux, both providing the fastest simulation of ARMv8 processors. 

At DAC, Simon Davidmann, Imperas CEO, is on a panel on Tuesday morning, titled “Open Source Embedded Software: Savior or Slayer?”, and is presenting a paper titled “Simulation Based Analysis and Debug of Heterogeneous Platforms” in the session on Heterogeneous Computing Platforms on Wednesday afternoon.

Imperas Announces ARMv8 ISS and ARMv8 Platform Roadmap

Imperas ISS is fastest ARMv8 simulation available

Oxford, United Kingdom, May 6th, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation and processor core models, has released an Instruction Set Simulator (ISS) for the ARMv8-A architecture.  In addition, Imperas announced its roadmap for products and virtual platforms supporting the ARMv8 family, including having two Extendable Platform Kits™ (EPKs™) available by the end of Q2. 

The ARMv8-A architecture currently has two core families, Cortex™-A53 and Cortex-A57.  The ARMv8-A architecture is ARM’s first 64-bit processor architecture, with initial licensees being primarily in the mobile and server market segments.  With a new architecture, new cores and, in the server space, new applications for ARM® cores, testing of the software becomes increasingly important.  With test suites typically consisting of hundreds or even thousands of tests, each of over 10 billion instructions, simulation speed is critical for robust and comprehensive testing of the software.

The Imperas simulation solutions together with the Imperas ARMv8 ISS and upcoming Imperas ARMv8 processor models provide the highest simulation performance available in the market.

Imperas Presents at TVS 2014 Virtual Platform Software Simulation for Enhanced Multi-core Software Verification

Imperas CEO, Simon Davidmann presented a paper at the TVS Software Testing Conference in March 2014. This presentation discussed the use of Virtual Platforms for embedded software development, discusses how high performance simulation can find bugs quicker, and demonstrates the Imperas parallel simulation technology QuantumLeap. Imperas tools are also discussed and a case study of using them to find bugs in OS porting is presented.

To see the presentation visit here on the Imperas website, to watch the video click here.

 

CDNLive, 11-12 March 2014, Santa Clara, California. Imperas Presenting a paper on the importance of simulation speed for software quality

CDNLive is March 11-12 in Santa Clara, California and is organized by Cadence Design Systems.  Imperas will be presenting a paper titled “Software Quality is Directly Proportional to Simulation Speed” as part of Track 6, at 4pm Tuesday March 11th.  Here is the abstract: 

“Software quality is directly proportional to simulation speed.”  This is obvious, even intuitive, for engineers.  Faster simulations mean more tests can be run, which in turn means more bugs can be found, which results in higher quality.  Reduced schedules can be a side benefit of speed. 

While this is obvious, why is it so important right now?  One example is server SoCs, where software/systems test suites can include hundreds of tests, each consisting of hundreds of billions of instructions.  If the virtual platform performance is 100 MIPS, this test suite could take over one week to run.  If the performance is five times faster, running the test suite takes 1 day; ten times faster and it runs overnight.  This simulation speed is especially interesting with the new generation of ARMv8 based server SoCs.  It is also interesting in areas such as image recognition, where hardware accelerators sit next to the CPUs on the SoC. 

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