All Imperas News

Eschew the Real World - EE Journal - Jim Turley

Recently Electronic Engineering Journal (EEJournal)'s Jim Turley wrote an interesting article on Imperas and the view that Imperas takes regarding software development.

"... Imperas thinks that programmers, as a class and as a profession, could stand to learn a few hard lessons from their colleagues over on the hardware side of the house. Specifically, the SoC and ASIC designers. Now those guys have got their stuff together. You could learn a few things from them. So what do the hardware guys do that the software people don’t? They simulate, mostly. They simulate the..."

"... The idea is that you simulate your code running on a simulated processor with simulated peripherals and simulated APIs. Everything runs on a standard x86-based PC; the more CPU cores it has, the better. Imperas’s tools will translate your ARM, MIPS, or other binaries to x86 on the fly for simulation. As part of that translation, the tools also..."

Read the full article is available on the EEJournal website here.

 

Imperas Exhibits at the Design Automation Conference 2015

Imperas shows Virtual Platforms for Software Development and Testing across Multiple IP Vendors and Applications

Oxford, United Kingdom - Imperas Software Ltd., the leader in high-performance software simulation, today announced their participation at  the Design Automation Conference (DAC) 2015 and invites attendees to register for a demonstration of Imperas embedded software development, debug and test solutions at the Imperas booth in the exhibition area.  Attendees can also register for the tutorial on embedded Linux being delivered by Imperas. 

DAC is recognized as the premier conference for Electronic Design Automation (EDA), offering outstanding training, education, exhibits and networking opportunities for designers, researchers, tool developers and vendors. DAC attracts a worldwide community of more than 1,000 organizations, represented by system designers and architects, logic and circuit designers, validation engineers, software development engineers, CAD managers, senior managers and executives, and academicians.

When: June 7-11, 2015.

Where: Moscone Center, San Francisco, CA.

Highlights:

Imperas at the Imagination Summit Silicon Valley May 2015

Learn More about Imperas MIPS CPU Virtual Platforms for Software Development and Testing

Oxford, United Kingdom - Imperas Software Ltd., the leader in high-performance software simulation, today announced their participation at the Imagination Summit Silicon Valley 2015 and invites attendees to meet for a demonstration of Imperas™ virtual platform based software development, debug and verification tools.

Imagination Summit Silicon Valley - "Securing the Future" - is a day-long series of presentations, demonstrations and detailed technical sessions with top executives and experts from Imagination Technologies and their partners. Attendees can explore the ultra-low power architectures in Imagination's SoC processor IP cores and discover security solutions for IoT and other markets.

Imagination will feature their new generation of MIPS Warrior CPUs, which are already supported by Imperas Open Virtual Platforms (OVP) models.  Imperas also supports MIPS-based SoC software development through its Extendable Platform Kits (EPKs), which help users to get a quick start with virtual platform methodology, and with tools for software debug, analysis and verification.  Imperas will have demos of the full line of MIPS models, as well as the EPKs and the Imperas embedded software tools. 

Recore Systems Selects Imperas for Virtual Platform Based Software Development Tools

Imperas Extendable Platform Kit Accelerates Development for Recore Many-Core Hardware and Software Program

Oxford, United Kingdom, 2 April 2015 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced that Recore Systems has selected Imperas for virtual platform based software development tools.  Recore is building a new many core hardware platform for various applications, including embedded vision.  Recore was able to get started quickly by using an Extendable Platform Kit™ (EPK™) from Imperas. 

The FlexaWare platform (www.flexaware.net), new from Recore Systems, is a many-core embedded system with three closely connected components: many-core hardware, a runtime (many-core) OS, and a software development environment. As the platform is built from the ground up, it is imperative to test important design concepts immediately in a simulation environment, to confirm that they function as expected.

Since time to market is crucial, Recore Systems searched for a simulation framework that could support design space exploration as well as software development and test.  Recore selected Imperas because of the nature of the components already on offer in the Imperas EPKs.

Security, MIPS VZ instructions and virtual platforms

One of the hottest topics in embedded systems today is security and safety. And one of the ways to address security and safety concerns is by using hypervisors and/or secure operating systems, and by specifically adding security into embedded software. To facilitate these techniques, Imagination Technologies added in hardware virtualization instructions – the VZ extensions – to the...

To read the blog, please visit the Imagination Blog Site.

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Imperas is founding member of prpl Foundation's Security Working Group

Founding members of the Security PEG include Broadcom, CUPP Computing, Elliptic Technologies, Ikanos, Imagination Technologies, Imperas Software, Ingenic, Kernkonzept, Lantiq (recently acquired by Intel), Qualcomm Atheros, Inc., Seltech, and others.

In March 2015, the prpl Foundation, an open-source non-profit foundation focused on enabling next-generation datacenter-to-device portable software and virtualized architectures, today announced the formal organization of its Security PEG (prpl Engineering Group). The formation of the Security PEG follows months of intensive planning by a subset of prpl members dedicated to defining an open security framework for deploying secured and authenticated virtualized services in the IoT and related emerging markets.

The new Security PEG will define a security roadmap to get from today’s software-virtualized solutions to full hardware supported virtualization, enabling multi-domain security across processors (CPUs, GPUs, NPUs), heterogeneous SoCs and systems built on these technologies including connected devices, routers and hubs. In addition, the Security PEG will define necessary open APIs (application programming interfaces) for various levels of the security stack.

Imperas release of Imagination Technologies MIPS Warrior IP core models - Embedded Computing Design - Rich Nass

Comments on Imperas Software, Green Hills Software announcments about how their support with models and tools boost Imagaination's MIPS architecture and move its ecosystem forward.

Follow the link to read the full article.

 

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Fast Processor Models of MIPS Warrior Cores Released by Imperas and Open Virtual Platforms

Imperas Virtual Platform Products Provide Interface to Imagination Codescape Debugger

Oxford, United Kingdom, 23 February 2015 - Imperas™ is releasing the Open Virtual Platforms™ (OVP™) Fast Processor Models for the MIPS Warrior P-class and M-class CPU IP cores from Imagination Technologies.  Example virtual platforms are also being released, as well as support for the cores in the Imperas M*SDK™ advanced software development tools.  In addition, the Imperas M*SDK and M*DEV™ products support the use of the Imagination Codescape Debugger for embedded software debug and development.

The processor core models and example platforms are available from the Open Virtual Platforms website, www.OVPworld.org/MIPS.  The models of the P5600 and M51xx processor cores, as well as models of other MIPS processors, work with the Imperas and OVP simulators, including the QuantumLeap™ parallel simulation accelerator, and have shown exceptionally fast performance of hundreds of millions of instructions per second.

Imperas Participates in the Embedded World Conference February 2015

Imperas Software Ltd., are participating in the popular Embedded World Conference 2015 at the Nuremberg Convention Center Ost, NürnbergMesse, 90471 Nuremberg, Germany, February 24.-26, 2015.

The embedded world Exhibition and Conference is the world’s largest platform for embedded-system technologies and the "knowledge tank" of one of the most innovative sectors. With its slogan "We are the Internet of Things", the Embedded World Conference 2015 sends out a clear signal that the embedded sector has been paving the way to the Internet of Things (IoT) for quite some time, because the IoT is about the mass interconnectedness of embedded systems.

Larry Lapides, Vice President of Sales for Imperas, will speak on QuantumLeap and multicore software development, debug and test, emphasizing new parallelized virtual platform acceleration technology. Session 3/II, 16:00 Tuesday.

See Imperas demos in the Imagination Technologies Ltd. booth, hall 4 / 4-671.
 

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Magillem partnering with Imperas: Enabling IOT using virtual platforms

This week it was announced that Magillem has been working with Imperas on tools for Virtual Platforms.

Daniel Payne of SemiWiki covered it here at SemiWiki.

The X-Spec tool from Magillem will generate hardware and software code based on specifications, creating System C TLM code and embedded C code. Models come from Imperas using OVP technology.

The full press release can be found here on EDACafe.

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