All Imperas News

Imperas Software Presents at Embedded World 2017

Imperas Discusses Virtual Platforms for Fast Fault Injection Testing of Embedded Systems

Oxford, United Kingdom, 1st March, 2017 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms for embedded systems and software development, debug and test, today announced that they will participate at the Embedded World Conference, featuring several technical papers. The event is March 14 - 16 2017 at the Exhibition Centre in Nuremberg, Germany. The full program can be viewed at www.embedded-world.eu/program.html.

Technical Papers:

  •  “Fast Fault Injection to Evaluate Multicore Systems Soft Error Reliability” by Larry Lapides, Imperas, with Felipe Rosa and Ricardo Reis, UFRGS and Luciano Ost, Leicester University.  Wednesday, March 15, 16:00 - 16:30.
  •  "Using Virtual Prototypes to Improve the Traceability of Critical Embedded Systems" by Jean-Michel Fernandez, Magillem, with Larry Lapides, Imperas. Tuesday, March 14, 10:30 - 11:00.

For more information, or to set up meetings with Imperas at the show, please email sales@imperas.com.

Imperas Paper at TVS DVClub 2016 Software Verification for Low Power Safety Critical Systems

<b>Abstract</b>:
<p>In November 2016, Simon Davidmann of Imperas gave a talk on how Imperas technology is being used for Timing Analysis, Power Analysis and Fault Simulation
to assist with Software Verification. Here are the slides. The talk was split into two sections.</p>
<p>The first section covers software verification for embedded systems and provides an overview of the challenges of many processors
in current embedded systems. It leads into the requirements for software verification and introduces specific embedded software development issues. It then
explains using simulation / virtual platforms and advanced tools to make embedded software development easier, quicker, and more affordable.</p>
<p>There are explanations of how simulation can be used with continuous integration and other modern software development practices.</p>
<p>The second section of the talk introduces the issues related to low power and how to use simulation to get a handle on the affects of software on low power design.
</p>
<p>Imperas is collaborating with several institutes and universities around the world and these collaborations are explored.</p>
<p>The use of Imperas Instruction Accurate simulation used for Timing Analysis, Power Analysis and Fault Simulation are discussed with examples and case studies.</p>

Imperas and T&VS Partner to Update Software Verification and Validation Methodology for Embedded Systems

Extending Best Practices for Embedded Software Development, Debug and Test via Virtual Platforms and Expertise

Oxford, United Kingdom, 2nd November, 2016 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, and Test and Verification Solutions (T&VS), a leading hardware verification and software testing provider, today announced that they have partnered to promote state-of-the-art software verification and validation (SW V&V) methodologies for embedded systems.

Imperas offers virtual platform (software simulation) based tools and solutions for early software development and more comprehensive software testing.  In addition to SW V&V, use cases include porting and bring up of hypervisors and operating systems, advanced software analysis such as non-intrusive code coverage, profiling and memory monitoring, and support for advanced methodologies such as Continuous Integration (CI) and fault injection. Imperas offers a wide variety of processor models and systems architectures from a range of IP and chip vendors through Open Virtual Platforms (OVP) models and platforms.

eSOL RTOS and Debugger Support Available from Imperas for Software Development and Test

eMCOS RTOS Support and eBinder Debugger Integration with Imperas Virtual Platforms

Oxford, United Kingdom, October 25, 2016 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced their support for the eSOL eMCOS RTOS and eBinder debugger.  eSOL is the leading RTOS and embedded software supplier in Japan. This partnership and the new capabilities accelerate embedded software development, debug and test across a variety of markets, including automotive. These solutions are available now.

Highlights:

Use a virtual platform to maintain security

embedded computing design

One of the big challenges in the deployment of IoT across varied markets is security. This is a big challenge for both hardware and software and there needs to be a pragmatic approach for developers.

The use of Hypervisors is becoming increasingly common - and Larry Lapides of Imperas has written about the use of Virtual Platforms with Hypervisors.

To read the article, click here.

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Heterogeneous System Challenges Grow

Semiconductor Engineering

How to make sure different kinds of processors will work in an SoC.

Ann Steffora Mutschler of Semiconductor Engineering has written an article on the challenges of heterogenous systems.

As more types of processors are added into SoCs—CPUs, GPUs, DSPs and accelerators, each running a different OS—there is a growing challenge to make sure these compute elements interact properly with their neighbors.

Adding to the problem is this mix of processors and accelerators varies widely between different markets and applications. In mobile there are CPUs, GPUs, video and crypto processors. In automotive, there may be additional vision processing accelerators. In networking and servers there are various packet processing and cryptography accelerators. Server applications traditionally have relied on general-purpose CPU, but the future brings more dedicated acceleration engines, which may be customized for specific applications and may be implemented using FPGAs.

Hypervisors: Help Or Hindrance?

Almost everything is a tradeoff and tipping the scales is usually influenced by the end product goals. Hypervisors have a few such parameters.

Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written an interesting article related to Hypervisors.

Hypervisors are seeing an increased level of adoption, but do they help or hinder the development and verification process? The answer may depend on your perspective.

In the hardware world, system-level integration is rapidly becoming a roadblock in the development process. While each of the pieces may be known to work separately, as soon as they are put together, the interactions between them can create a number of problems. The industry is working to come up with some tools and methodologies that constrain this problem.

In the software world, they are taking a different approach. They are using a hypervisor to create well-defined interfaces between the individual software blocks, ensuring that one cannot disturb another. This enables applications to be built that are more robust, provide a significant increase in security, allow for staged development and enables the controlled intermixing of attributes of a real time environment, with a more flexible operating system environment such as Linux.

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