Imperas at the RISC-V Workshop Barcelona May 2018

Imperas will Exhibit Virtual Platforms and Present on Software Development Environments for RISC-V

riscv workshop

Imperas will participate in the official RISC-V Workshop Barcelona in May 2018 in Barcelona, Spain, and invites you to “Join the RISC-V Revolution!” and be part of the disruptive force transforming the microprocessor IP market through open standard collaboration.

Co-hosted by the Barcelona Supercomputing Center (BSC) and the Universitat Politècnica de Catalunya (UPC) and sponsored by NXP and Western Digital in Barcelona, Spain, the upcoming RISC-V workshop will feature recent technical activity in the ever-expanding RISC-V ecosystem.

The RISC-V Workshop Barcelona 2018 will feature an Imperas exhibit and two presentations on virtual platform technology for RISC-V based designs. View the agenda here.

Presentation: “A Common Software Development Environment for Many-core RISC-V based Hardware and Virtual Platforms.” May 8, 2018 at 2:15 PM

  • Complex SoCs contain not just multi-core processors but multiple clusters of processors from multiple vendors utilizing different architectures. RISC-V has gained attention across a wide range of end markets and applications, and some of the emerging markets requirements are themselves at the forefront of innovation and exploration. Early software development is key to efficiently capitalize on these new opportunities while presenting RISC-V developers with additional challenges both in SoC development such as customizable functions and with the end application development.  To accelerate the time to market, virtual platforms and fast simulators can assist with early software development. In such platforms, complete visibility of the whole system is available greatly aiding the development of functional software. Migrating to the physical hardware, when it is available, with as near similar visibility using the same development environment will greatly increase product integration.  The same environment can be used for all the stages of the system development process: RTL simulation, virtual platform simulation, and SoC/FPGA hardware.
  • Authored by Simon Davidmann, CEO, Imperas Software Ltd., and Gajinder Panesar, CTO, UltraSoC Technologies Ltd.

Presentation: “RISC-V Virtual Platforms for Early RISC-V Embedded Software Development.” May 9, 2018 at 4:45 PM.

  • New IP solutions and SoCs based on RISC-V need to convincingly gain the attention and support of key ecosystem providers and attract the elusive customer interest. Providing an early simulation-based development platform that demonstrates the key features of both RISC-V, extensions and other enhancements of a new IP solution or SoC is widely regarded as a good start. To really be useful a developer also needs full software development tools and support. RISC-V has many unique advantages and features that are attracting significant attention from emerging applications and new business areas, and these applications are also pioneering new innovations. The needs for early software development platforms have never been greater, with new markets and applications in areas such as IoT, Connected Car, and AI as the requirements are evolving in parallel to the hardware development. Early software development based on a virtual platform allows greater insight into the overall system operation thus ensuring critical feedback on optimizations early in the development schedule. This presentation will illustrate the development of a virtual platform from a library of reference platforms than can be adapted to match the target configuration requirements with a use case description and a methodology and flow backdrop.
  • Authored by Lee Moore, Consulting Engineer, Imperas Software Ltd. and Hugh O'Keeffe, Engineering Director, Ashling

View the agenda here.

RISC-V Workshop Barcelona 2018 Exhibit: Imperas will show virtual platform technology for RISC-V based designs.

Where: Universitat Poletècnica de Catalunya Barcelona Tech, in Barcelona, Spain.

When: May 7 - 10, 2018.

Please contact info@imperas.com to set up a meeting at the RISC-V Workshop Barcelona, or to learn more about Imperas virtual prototyping solutions for embedded software development, debug and test.

For more information on the RISC-V Workshop Barcelona, please click here.

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