For a demo of how easy it is to download the OVP simulator and models, and a quick walk through downloading and running the applications running on a RISC-V Fast Processor Model, please watch this video.
Comments
Jérôme Quévremont, vice-chair of OpenHW Cores Task Group
Thales Research & Technology
Following the success of the CV32E40P verification, riscvOVPsimCOREV was selected as a reference model for the CVA6 application cores.
The selection by Imperas of a freeware license model to support CORE-V IPs is a great move towards the adoption of OpenHW industrial-grade CORE-V processor cores by a broader community.
Shoi Egawa
CEO of SELTECH Corporation
Imperas enables SELTECH to create new value for our customers by reducing time and cost-to-market, while improving their overall system performance. Our work with market leaders including Imperas and Imagination will help us continue to strengthen our position across the Japanese electronics market and beyond.