DVCon 2016 Panel Addresses Redefining ESL
OXFORD, United Kingdom, February 9, 2016 -- Imperas Software Ltd., leader in high-performance software simulation and virtual prototyping, today announced that its CEO, Simon Davidmann, will speak on an Electronic System Level (ESL) panel at DVCon 2016. DVCon is the premier conference for discussion of the functional design and verification of electronic systems.
This DVCon panel, “Redefining ESL”, is moderated by Brian Bailey of Semiconductor Engineering, who recently wrote an article titled, “What ESL Is Really About.” There are many views on the role of ESL (Electronic System Level) in design and verification, so panelists will have plenty to consider as they discuss raising the level of abstraction from the Register Transfer Level (RTL) to ESL for both hardware and software.
DVCon attendees are invited to join Brian Bailey, Simon Davidmann, and other distinguished experts who will attempt to define ESL verification, from tools to flows. Specifically, Simon will address where ESL and verification needs to go, virtual platforms, embedded software development, debugging, analysis, and verification.
- Simon Davidmann - Imperas Software Ltd.
- Adnan Hamid - Breker Verification Systems, Inc.
- Sean Dart - Cadence Design Systems, Inc.
- Bryan Bowyer - Mentor Graphics Corp.
- Raik Brinkmann - OneSpin Solutions GmbH
- Tom De Schutter - Synopsys, Inc.
Where: DoubleTree Hotel, San Jose, CA
When: DVCon: February 29 - March 3, 2016. Redefining ESL
Panel: Wednesday March 2, 8:30 - 9:30am
Please contact email@example.com to learn more about Imperas virtual prototyping solutions for embedded software development, debug and test; or to set up a meeting at DVCon 2016.
For more information, see DVCon at www.dvcon.org and its sponsor Accellera Systems Initiative at www.accellera.org.
For more information about Imperas, please see www.imperas.com.
All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.
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