Bulls, Bears and Bunnies: The 6th RISC-V Workshop in Shanghai

embedded computing design

The 6th RISC-V Workshop was held May 8-11 in Shanghai.   RISC-V is, of course, the open-source processor architecture invented and introduced by the University of California, Berkeley in 2014. The previous workshop, held last November in Silicon Valley, attracted around 350 participants; this workshop about the same.

The opening statement of the Imperas presentation at the workshop was "The size of the RISC-V market share will depend more on the software ecosystem than on specifics of RISC-V implementations."  The meat of the presentation focused on modern embedded software development methodology, specifically on Continuous Integration Continuous Test (CI / CT) subset of the Agile methodology.

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