News & Press Articles

Extendable Platform Kits for MIPS Released by Imperas

Enabling quick start for developing and testing software

Oxford, United Kingdom, 20 November 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced the availability of Extendable Platform Kits™ (EPKs™) for MIPS CPU cores from Imagination Technologies.

These EPKs for MIPS, available for download from the Open Virtual Platforms™ (OVP™) website, are designed to provide a base for users to run high-speed simulations of MIPS-based SoCs and platforms on any suitable PC. They are based on the functionality of Imagination’s MIPS FPGA evaluation platforms, enabling anyone to simulate MIPS-based systems using Imagination’s reference platforms. EPKs provide a base for users to extend the functionality of the virtual platform, to closer reflect their own platform, by adding more component models, running different operating systems or adding additional applications.

Kyma Systems Selects Imperas Virtual Platform Tools for Hypervisor Development

Imperas M*SDK used for KVM development supporting MIPS hardware virtualization instructions

Oxford, United Kingdom, June 3rd, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, announced today that Kyma Systems has been successfully using the Imperas M*SDK™ for virtual platform-based development of hypervisors.  M*SDK enabled porting of the KVM hypervisor to support Imagination Technologies' latest MIPS cores with virtualization extensions.  The OS- and CPU-aware tools included with M*SDK also enabled more comprehensive and faster testing of the hypervisor.     

Imperas Announces ARMv8 ISS and ARMv8 Platform Roadmap

Imperas ISS is fastest ARMv8 simulation available

Oxford, United Kingdom, May 6th, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation and processor core models, has released an Instruction Set Simulator (ISS) for the ARMv8-A architecture.  In addition, Imperas announced its roadmap for products and virtual platforms supporting the ARMv8 family, including having two Extendable Platform Kits™ (EPKs™) available by the end of Q2. 

The ARMv8-A architecture currently has two core families, Cortex™-A53 and Cortex-A57.  The ARMv8-A architecture is ARM’s first 64-bit processor architecture, with initial licensees being primarily in the mobile and server market segments.  With a new architecture, new cores and, in the server space, new applications for ARM® cores, testing of the software becomes increasingly important.  With test suites typically consisting of hundreds or even thousands of tests, each of over 10 billion instructions, simulation speed is critical for robust and comprehensive testing of the software.

The Imperas simulation solutions together with the Imperas ARMv8 ISS and upcoming Imperas ARMv8 processor models provide the highest simulation performance available in the market.

Imperas Supports Imagination MIPS Cores With Fastest Ever Processor Model Simulation

QuantumLeap parallel simulation accelerator enables virtual platform performance of greater than 16 billion instructions per second, the fastest commercial solution available today

Oxford, United Kingdom, February 4th, 2014 - Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, has added support for models of Imagination Technologies’ MIPS processors to QuantumLeap™, a parallel simulation performance accelerator.

QuantumLeap leverages Imperas’ new synchronization algorithm to provide the fastest virtual platform software execution speed available today on standard, multi-core Personal Computer (PC) host machines.  The Imperas technology - simulation plus processor core models - provides the MIPS ecosystem with the fastest software simulation solution in the industry. 

Imperas Delivers QuantumLeap Simulation Synchronization – Industry's First Parallel Virtual Platform Simulator

Parallel synchronization technology augments existing high-performance simulator to accelerate virtual platforms beyond 16,000 MIPS, the fastest commercial solution available today

Oxford, United Kingdom, October 22nd, 2013—Imperas Software Ltd. (www.imperas.com), the leader in high-performance software simulation, has released QuantumLeap™, a parallel simulation performance accelerator. QuantumLeap leverages a new synchronization algorithm to provide the fastest virtual platform software execution speed available today on standard, multi-core Personal Computer (PC) host machines.

The execution performance of this new technology has been measured on average at 15 times faster than the nearest commercial solution using standard benchmarks.

Many current System-on-Chip (SoC) hardware platforms, for example mobile and server devices, incorporate multi-core embedded processors coupled with hardware accelerators, all executing in parallel. The performance of existing, single-threaded virtual platform simulators does not adequately scale for these SoCs, creating a barrier to efficient virtual platform-based software development.

Altera Nios II Processor Model Delivered By Imperas

Open source simulation model enables Altera customers to more easily validate and debug Nios II embedded software

San Jose, Calif., October 22nd, 2013—Imperas Software Ltd. (www.imperas.com), founder of the Open Virtual Platforms™ (OVP™) consortium, today announced the availability of the Altera Nios II embedded processor OVP model. Jointly developed by Imperas and Altera, this open source model will enable a high-performance development environment for Nios II embedded software.

The OVP Fast Processor Model of the Nios II may be configured at start-up to match the intended behavior of the actual FPGA component, but will execute significantly faster than real-time. This allows embedded software to be tested more rigorously and earlier in the design process, accelerating complex software development cycles.

“Imperas led formation of the Open Virtual Platforms consortium to improve the embedded software development experience,” said Simon Davidmann, CEO of Imperas. “With Altera, we have taken an important step today by providing designers with a high-performance model of the Altera Nios II processor, executing many times faster than other development offerings to enable the most comprehensive software verification solution available.”

Imperas™ Provides Comprehensive ARM® TrustZone® Modeling Kit For OVP-Based Virtual Platforms

Kit Includes Modeling Application Note and Four Open Source, Executable Platform Examples Based Upon OVP™ ARM Cortex™ Processor Models With TrustZone Technology

OXFORD, United Kingdom, October 8th, 2013 – Imperas Software Ltd. (www.Imperas.com), a pioneer of advanced embedded software development systems using virtual platforms, today made available a System Modeling Kit designed to simplify the creation of high-performance virtual platforms that incorporate the ARM TrustZone technology.

The System Modeling Kit provides four open source virtual platform reference models, together with an application note and video, to demonstrate best modeling practices for systems based on TrustZone. The kit is designed to accelerate the learning curve for modeling TrustZone-based hardware, to provide high-performance, accurate virtual platforms that accelerate system verification, and make available immediate solutions for the execution of software stacks that incorporate security solutions based on TrustZone.

Imperas™ Releases the PowerPC® 4xx Range of High-Performance Processor Models with Integrated Software Development Environment

Open Virtual Platforms (OVP™) Fast Processor Model Supports the PowerPC 440™, PowerPC 460™, PowerPC 470™ and PowerPC 476™ Variants of the Popular Processor

OXFORD, United Kingdom, September 26, 2013 – Imperas Software, Ltd. has today released its latest OVP Fast Processor Model for the POWER.org architecture. The new Imperas model of the IBM PowerPC 4xx range supports the PowerPC 440, PowerPC 460, PowerPC 470 and PowerPC 476 variants. The model is available as part of the OVP library, allowing for free access to OVP users.

The IBM PowerPC 4xx processor range is widely utilized by many companies today in a range of applications including automotive, compute servers, military and aerospace, wired and wireless communications, and home entertainment.

The new OVP Fast Processor Model uses Imperas’ high performance code morphing technology to allow software engineers to execute PowerPC development code at hundreds of million lines per second on their desktop personal computers. Incorporated within the model is Imperas’ range of advanced development tools for efficient software analysis and debug.

Altera discuss successful use of Imperas tools to find complex OS bugs

At the June 3, 2013 North American SystemC User Group meeting as part of the Design Automation Conference 2013 in Austin Texas, Victoria (Vicki) Mitchell of Altera presented a paper titled: Embedded Software Dynamic Analysis: A New Life for the Virtual Platform.

The presentation introduces the Software part of HW/SW co-design, with the issues of Code Safety and Security being addressed and how Dynamic Analysis using simulation and virtual platforms can address them. It continues with Software Analysis by using a platform modeled with OVP and using the Imperas tools shows examples of how bugs were found in the use of Linux and uC/OS-ii. The presentation concludes with the conclusion that the use of virtual platforms and dynamic analysis provides safe and secure code for embedded systems.

The slides are available here:  http://nascug.org/events/19th/Dynamic_Analysis_6-3-2013.pdf

Nikkei Electronics article about Imperas new products

Imperas recently announced its new generation of Software Development Tools that utilize Virtual Platforms.

Nikkei Electronics in Japan have written an article in Japanese about this announcement - to read the article please follow this link: http://techon.nikkeibp.co.jp/article/NEWS/20130822/298823/

 

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