All Imperas News

Imperas Software Presents at Embedded World 2017

Imperas Discusses Virtual Platforms for Fast Fault Injection Testing of Embedded Systems

Oxford, United Kingdom, 1st March, 2017 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms for embedded systems and software development, debug and test, today announced that they will participate at the Embedded World Conference, featuring several technical papers. The event is March 14 - 16 2017 at the Exhibition Centre in Nuremberg, Germany. The full program can be viewed at www.embedded-world.eu/program.html.

Technical Papers:

  •  “Fast Fault Injection to Evaluate Multicore Systems Soft Error Reliability” by Larry Lapides, Imperas, with Felipe Rosa and Ricardo Reis, UFRGS and Luciano Ost, Leicester University.  Wednesday, March 15, 16:00 - 16:30.
  •  "Using Virtual Prototypes to Improve the Traceability of Critical Embedded Systems" by Jean-Michel Fernandez, Magillem, with Larry Lapides, Imperas. Tuesday, March 14, 10:30 - 11:00.

For more information, or to set up meetings with Imperas at the show, please email sales@imperas.com.

Imperas and OFFIS Paper at ARM TechCon 2016 on Integrating Power Models into Instruction Accurate Virtual Platforms for ARM-base

<b>Abstract</b>:
In this paper the current state of embedded software development is discussed. A comparison is made between hardware-based and virtual platform-based methodologies. The management issues of software predictability and delivery risk are discussed. Software verification requirements are introduced. There are many advantages of using Virtual Platform based software development approaches and these are shown. Virtual Platforms and simulation can complement a hardware based software development approach.
<p>The Imperas tool architecture is explained and it is shown how this is used to build a virtual platform and how this enables timing based software simulation to run at upto 500 MIPS whilst using quanta of between 1,000 and 100,000. The control flow between the platform, simulator, intercept library and procesor model is shown.</p>
<p>An approach to Power Modeling with dynamic frequency and voltage scaling (DVFS) is outlined with an introduction on how the Power Model is developed. There are slides with speakers notes on Design-Time, Run-Time, and System-Level Power Analysis and parameters. </p>

Imperas and T&VS Partner to Update Software Verification and Validation Methodology for Embedded Systems

Extending Best Practices for Embedded Software Development, Debug and Test via Virtual Platforms and Expertise

Oxford, United Kingdom, 2nd November, 2016 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, and Test and Verification Solutions (T&VS), a leading hardware verification and software testing provider, today announced that they have partnered to promote state-of-the-art software verification and validation (SW V&V) methodologies for embedded systems.

Imperas offers virtual platform (software simulation) based tools and solutions for early software development and more comprehensive software testing.  In addition to SW V&V, use cases include porting and bring up of hypervisors and operating systems, advanced software analysis such as non-intrusive code coverage, profiling and memory monitoring, and support for advanced methodologies such as Continuous Integration (CI) and fault injection. Imperas offers a wide variety of processor models and systems architectures from a range of IP and chip vendors through Open Virtual Platforms (OVP) models and platforms.

eSOL RTOS and Debugger Support Available from Imperas for Software Development and Test

eMCOS RTOS Support and eBinder Debugger Integration with Imperas Virtual Platforms

Oxford, United Kingdom, October 25, 2016 - Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced their support for the eSOL eMCOS RTOS and eBinder debugger.  eSOL is the leading RTOS and embedded software supplier in Japan. This partnership and the new capabilities accelerate embedded software development, debug and test across a variety of markets, including automotive. These solutions are available now.

Highlights:

Use a virtual platform to maintain security

embedded computing design

One of the big challenges in the deployment of IoT across varied markets is security. This is a big challenge for both hardware and software and there needs to be a pragmatic approach for developers.

The use of Hypervisors is becoming increasingly common - and Larry Lapides of Imperas has written about the use of Virtual Platforms with Hypervisors.

To read the article, click here.

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Heterogeneous System Challenges Grow

Semiconductor Engineering

How to make sure different kinds of processors will work in an SoC.

Ann Steffora Mutschler of Semiconductor Engineering has written an article on the challenges of heterogenous systems.

As more types of processors are added into SoCs—CPUs, GPUs, DSPs and accelerators, each running a different OS—there is a growing challenge to make sure these compute elements interact properly with their neighbors.

Adding to the problem is this mix of processors and accelerators varies widely between different markets and applications. In mobile there are CPUs, GPUs, video and crypto processors. In automotive, there may be additional vision processing accelerators. In networking and servers there are various packet processing and cryptography accelerators. Server applications traditionally have relied on general-purpose CPU, but the future brings more dedicated acceleration engines, which may be customized for specific applications and may be implemented using FPGAs.

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